Technology Update: New Fabrication & Characterization Capabilities Available Now!
We are excited to announce the pre-release of three cutting-edge capabilities at UCSD Nanofab, specifically engineered to advance your research in heterogeneous integration on glass and silicon substrates.
Whether you are looking for advanced thin-film deposition, high-performance TFT prototyping, or precise thermal characterization, our foundry is fully equipped to support your end-to-end workflow—from initial consultation and design to fabrication and testing.
1. Pre-Release Aluminum Nitride (AlN) Deposition Process
Optimized for deposition on insulator and amorphous surfaces, this new process is highly well-characterized across its material, electrical, and thermal properties. A primary use case includes BEOL (Back-End-of-Line) integration with back-gated ITO transistors. For complete technical specifics, please refer to the file UCSD_AlN_Thin_Film_Deposition_Process_Information_Sheet.
Rapid Film Deposition: Attains deposition speeds of > 60 nm/s utilizing High-Power Impulse Magnetron Sputtering (HiPIMS) + Kick sputtering.
Dual-Property Excellence: Functions as an exceptional thermal conductor while maintaining excellent electrical insulation.
Substrate Support: Features 4″ wafer process capability and is environmentally stable.
| Parameter | UCSD AlN Target Value |
| Film Thickness | 10 nm – 10 µm |
| Thermal Conductivity | > 125 W/m·K |
| Leakage Current Density | ~ 10 nA/cm² @ 1 MV/cm |
| Film Roughness | < 1 nm |
| Film Uniformity | ~ 95% (4″ wafer) |
2. Pre-Release 2 µm IGZO TFT Process
Engineered to accelerate design and prototyping for mixed signals, imaging, sensing, photonics, and display technologies. This process allows for seamless heterogeneous integration with CMOS and glass panels. Detailed design rules and models can be found by referencing the file UCSD_IGZO_2um_Process_Information_Sheet.
Low-Temperature Processing: Fabricated at a low thermal budget of 350 °C.
Advanced Interconnects: Features a robust two-level metal interconnect scheme.
Comprehensive PDK Support: Fully compatible with AWR and ADS, featuring a PDK with Virtuoso, SPICE modeling, DRC, LVS, parameter extraction, and reference library cells.
| Parameter | UCSD IGZO 2µm Target Value |
| Vthreshold | 0.5 V |
| Threshold Uniformity | ±60 mV |
| Subthreshold Slope (@ 1nA) | ~100 mV/decade |
| Isat | 5 µA/µm |
| On-Off Ratio | > 10⁷ |
| Electron Mobility | > 5 cm²/V-s |
| OFF Current | < 10⁻²⁰ A/µm |
| gm @ 4V Vds | ~ 5 mS/mm |
3. Pre-Release Thermal Conductivity Determination Service
To support modern 2.5D and 3D heterogeneous integration architectures, we have introduced a well-characterized, low-error testing technique to measure the thermal conductance of thin films. For detailed operational parameters, refer directly to the file UCSD_Thermal_k_determination_Process_Information_Sheet.
Comprehensive Testing: Measures both in-plane and cross-plane heat transfer utilizing both spatial and frequency domains.
Broad Scale Flexibility: Capable of probing film thicknesses spanning from the sub-micron level up to a millimeter scale.
Wafer-Scale Probing: Supports small coupon samples up to full 6″ wafers on both conducting and insulating substrates.
Simulation-Backed: Offers computational simulation support to correlate structural materials with electrical property attributes.
| Parameter | UCSD Thermal Probing Range |
| Film Thickness | 100 nm to 1 mm |
| Thermal Conductivity | 1 – 400 W/m·K |
| Thermal Boundary Resistance | 1 – 1000 W/m²·K |
Get Started With Our Foundry Services
Foundry Capabilities: All listed services support both full-wafer and coupon-sized samples. UCSD Nanofab provides a complete end-to-end pipeline, including Consultation, Design, Fabrication, and Testing.
For inquiries, custom design consultations, or to request process access, please contact us directly:
Contact Email: furao@ucsd.edu
